ChIP goes dynamic
نویسندگان
چکیده
منابع مشابه
High-Speed Dynamic Programmable Logic Array Chip
This paper describes the circuit design of a programmable logic array chip using four-phase dynamic circuits, operating at a nominal cycle time of 230 nanoseconds. Bootstrap circuit techniques are used to obtain high function and performance by satisfying some special requirements of PLA designs. These include a simple means for two-bit partitioning of the data inputs, a noninverting buffer cir...
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ژورنال
عنوان ژورنال: Nature Methods
سال: 2013
ISSN: 1548-7091,1548-7105
DOI: 10.1038/nmeth.2753